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个人信息：Personal Information
教授 博士生导师 研究生导师
性别：男
学历：博士研究生毕业
学位：哲学博士学位
在职信息：在岗
所在单位：集成电路学部
学科：集成电路系统设计
办公地点：西安电子科技大学 北校区
办公楼 I-203
联系方式：xtzhao@xidian.edu.cn
电子邮箱：
A 0.0285-mm2 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS
点击次数：
发表刊物：IEEE Journal of Solid-State Circuits
刊物所在地：美国
关键字：Acquisition speed, BBCDR, charge pump CP, CMOS, PAM4, FD, HCC,JTOL, JTF, PD, SP
摘要：This article reports a single-loop full-rate bang-bang clock and data recovery (BBCDR) circuit supporting a fourlevel pulse amplitude modulation (PAM-4) pattern. We eliminate both the reference and the separate frequency detector (FD) by deliberately adding two fixed strobe points in the bang-bang phase detector (BBPD) curve via a clock-selection scheme. As such, we can achieve a wide frequency-capture range in a single-sided FD polarity. The BBPD also incorporates a hybrid control circuit to automate the frequency acquisition over a wide
frequency range.
论文类型：期刊论文
卷号：57
期号：2
页面范围：546-561
是否译文：否