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Paper Publications
[9] Continuous time 危螖ADC design with 256 MHz sampling and 71 dB DR
2018-06-08
[10] New coaxial through silicon via (TSV) applied for three dimensional integrated circuits (3D ICs)
2018-06-08
[11] An IM2-free floating current buffer using average power based automatic calibration for IEEE 802.15.6 transmitter
2018-06-08
[12] An area-efficient and high speed multiplexer for battery monitor system
2018-06-08
[13] A Power-Efficient Compact Pipelined ADC for ZigBee Receiver Applications
2018-06-08
[14] A 20-mV Input DC/DC Converter for Energy Harvesting Applications
2018-06-08
total14 2/2
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杨银堂
Recommended Ph.D.Supervisor
Recommended MA Supervisor
Personal Information:
Name (Simplified Chinese):
杨银堂
Name (English):
Yang Yintang
Name (Pinyin):
YANGYINTANG
E-Mail:
ytyang@xidian.edu.cn
Date of Employment:
1984-07-01
Administrative Position:
无
Education Level:
With Certificate of Graduation for Doctorate Study
Business Address:
西安电子科技大学 北校区科技楼A703
Gender:
Male
Degree:
Doctoral Degree in Engineering
Professional Title:
Professor
Other Post:
校学术委员会副主任
Alma Mater:
西安交通大学
Supervisor of Doctorate Candidates
Supervisor of Doctorate Candidates
graduate teacher
graduate teacher
Discipline:
Integrated Circuit System Design Microelectronics and Solid State Electronics Materials Physics and Chemistry
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