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毛伟
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Associate researcher graduate teacher
Paper Publications
[1]A Low-Power Charge-Domain Bit-Scalable Readout System for Fully-Parallel Computing-in-Memory Accelerators.IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II).2024
[2]A Low-Power DNN Accelerator with Mean Error Minimized Approximate Signed Multiplier.IEEE Open Journal of Circuits and Systems (OJCAS).2024
[3]A Reconfigurable Processing Element for Multiple-Precision Floating/Fixed-Point HPC.IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II).2024
[4]APCCAS 2022 Guest Editorial Special Issue Based on the 18th Asia Pacific Conference on Circuits and Systems.IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I).2023
[5]A Low-Power Sparse Convolutional Neural Network Accelerator with Pre-Encoding Radix-4 Booth Multiplier.IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II).2023
[6]An Energy-Efficient Mixed-Bit CNN Accelerator with Column Parallel Readout for ReRAM-based In-memory Computing.IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS).2022
[7]An Energy-Efficient Mixed-Bitwidth Systolic Accelerator for NAS-Optimized Deep Neural Networks.IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI).2022
[8]A Fall Detection Network by 2D/3D Spatio-Temporal Joint Models with Tensor Compression on the Edge.ACM Transactions on Embedded Computing Systems (TECS).2022
[9]A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing.IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II).2022
[10]A High Performance Multi-bit-width Booth Vector Systolic Accelerator for NAS Optimized Deep Learning Neural Networks.IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I).2022
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