李登全
个人信息:Personal Information
教授 研究生导师
性别:男
毕业院校:西安电子科技大学
学历:博士研究生毕业
学位:工学博士学位
在职信息:在岗
所在单位:微电子学院
入职时间:2018-07-13
办公地点:老校区东大楼4楼
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- A 7b 2.6mW 900MS/s nonbinary 2-then-3b/cycle SAR ADC with background offset calibration.IEEE Custom Integrated Circuits Conference (CICC).2019
- A 10-bit 600-MS/s time-interleaved SAR ADC with interpolation-based timing skew calibration.IEEE Transactions on Circuits and Systems II: Express Briefs.2019,66(1):16-20
- A background timing skew calibration technique in time-interleaved ADCs with second order compensation.IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).2018:53-556
- A 1.4-mW 10-bit 150-MS/s SAR ADC with nonbinary split capacitive DAC in 65 nm CMOS.IEEE Transactions on Circuits and Systems II: Express Briefs.2018,65(11):1524-1528
- A background fast convergence algorithm for timing skew in time-interleaved ADCs.Microelectronics Journal.2016,47(1):45-52
- An 8-bit 0.333-2 GS/s configurable time-interleaved SAR ADC in 65-nm CMOS.Journal of Circuits, Systems, and Computers.2015,24(6):1-14
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